Title: Year 12 / Computer Science / Theory / 4 - Processor Fundamentals / 4.1 - Central Processing Unit (CPU) Architecture

Q: Describe the basic features of a Von Neumann model
A: data and programs are indistinguishable and can use same memory
model uses a single processor
follow linear sequence of fetch-decode-execute operations for set of instructions, usually the program
processor uses registers for this

Q: Describe what is meant by a register
A: smallest unit of storage of a microprocessor, allows fast data transfer between other registers

Q: Describe the purpose and role of a general purpose register
A: registers that dont have a specific function, only used to temporarily store data values read from memory or some processed result, can be used by assembly language instructions

Q: Describe the purpose and role of special purpose registers
A: they have specific function, only some are accessible by assembly language instructions, only holds data or memory location not both

Q: State the purpose of the Program Counter (PC) register
A: holds address of next instruction to be fetched

Q: State the purpose of the Memory Data Register (MDR)
A: holds data value fetched from memory

Q: State the purpose of the Memory Address Register (MAR)
A: holds address of memory cell of program which is to be accessed

Q: State the purpose of the Accumlator (ACC)
A: holds all values that are processed by arithmetic and logic operations

Q: State the purpose of the Index Register (IX)
A: stores a number used to change an address value

Q: State the purpose of the Current Instruction Register (CIR)
A: once program instruction is fetched, its stored in CIR and allows processor to decode and execute it

Q: State the purpose of the Status Register (SR)
A: holds results of comparisions to decide later for action, intermediate and erroneous results of arithmetic performed

Q: Describe what is meant by the Arithmetic and Logic Unit (ALU)
A: part of CPU that processes instructions which require arithmetic or logical operations

Q: Describe what is meant by the Control Unit (CU)
A: part of CPU that fetches instructions from memory, decodes them and synchronizes operations, then sends signals to computers memory, ALU and io devices to direct them how to respond to instructions sent to processor

Q: Describe what is meant by the Immediate Access Store (IAS)
A: memory unit that can be directly accessed by processor

Q: Describe what is meant by the System Clock
A: timing device thats connected to processor that synchronizes all components

Q: Explain what is meant by a bus
A: set of parallel wires that allow transfer of data between components in computer system

Q: Explain what is meant by a data bus
A: bidirectional bus that carries data and instructions between processor, memory and io devices

Q: Explain what is meant by a address bus
A: unidirectional bus that carries address of main memory location or io device about to be used, from processor to MAR

Q: Explain what is meant by a control bus
A: bidirectional and unidirectional bus used to transmit control signals from control unit to ensure access of data and address buses by components of system doesnt lead to conflict

Q: State 4 factors that affect the performance of computer system factors
A: clock speed, bus width, cache memory, number of cores

Q: State what is meant by clock speed
A: number of pulses clock sends out in given time interval which determines the number of cycles cpu executes in given time interval, measured in gigahertz

Q: State what is meant by bus width
A: number of wires/lines in a bus, determines number of bits that can be simultaneously transferred

Q: State what is meant by cache memory
A: area of cpu which stores commonly used instructions

Q: Explain how the number of cores in a CPU affects computer performance
A: most cpu chips are multicore, so multiple cores, each core simultaneously processes different instructions by multithreading, which improves computer performance

Q: Explain how the clock speed affects computer performance
A: increase in clockspeed means execution time for instructions decreases, so more cycles per unit time which increases performance

Q: Explain how the bus width affects computer performance
A: increasing bus width increases number of bits transferred at once, so increases processing speed and performance

Q: Explain how the cache memory affects computer performance
A: increasing cache memory means more commonly executed instructions can be stored, so time taken for cpu to wait for instructions to load reduces, so cpu is able to execute more cycles per unit time, increasing performance

Q: Explain why a limit on clock speed may be required
A: theres limit on clock speed as heat generated by higher clock speeds cant be removed fast enough, which leads to overheating

Q: Describe what is meant by a port and its purpose
A: hardware which provides physical interface between device with cpu and peripheral device, peripheral devices cant be directly connected to cpu, so connected through ports

Q: Explain how an HDMI provides connection from the CPU to peripheral devices
A: hdmi cables transmit high bandwidth and high resolution video and audio streams through hdmi ports

Q: Describe what is meant by USB
A: universal serial bus, can connect both input and output devices to processor through USB port

Q: Describe what is meant by HDMI
A: high definition multimedia interface, can only connect output devices to processor through HDMI port

Q: Describe what is meant by VGA
A: video graphics array, can only connect output devices to processor through vga port, vga ports only allow transmission of video streams but not audio streams

Q: State the stages of the fetch execute cycle
A: fetch, decode, execute

Q: Describe the fetch stage of the fetch execute cycle
A: PC holds address of next instruction to be fetched, address in PC copied to MAR, PC is incremented, instruction is loaded to MDR from address held in MAR, instruction from MDR loaded to CIR

Q: Describe the decode stage of the fetch execute cycle
A: opcode and operand parts of instruction are identified

Q: Describe the execute stage of the fetch execute cycle
A: instructions are executed by control unit sending control signals

Q: Write down the entire register transfer notation for the fetch execute cycle
A: MAR <- [PC], PC <- [PC] + 1, MDR <- [[MAR]], CIR <- [MDR], decode, execute, return to start

Q: Describe what is meant by square brackets "[]" in the fetch execute cycle
A: indicates value currently inside the register in the brackets

Q: Describe what is meant by double square brackets "[[]]" in the fetch execute cycle
A: cpu is fetching the value stored at the address stored in register in the brackets

Q: Describe what is meant by an interrupt
A: signal from program seeking processor's attention

Q: Describe what is meant by ISR
A: interrupt service routine, handles interrupt by controlling processor, different ISRs are used for different sources of interrupt

Q: Describe how interrupts are handled
A: processor checks interrupt register for interrupt at end of FE cycle for current instruction, if interrupt flag is set in register, interrupt source is detected, if interrupt is low priority, its disabled, if its high priority, all contents of registers of running process are saved on stack, PC is loaded with ISR and executed, once ISR complete, processor restores registers contents from stack, and interrupted program continues execution, interrupts are re enabled and processor returns to start of the cycle

Q: State 5 possible causes of interrupts
A: fatal error in program, hardware fault, need for io processing to begin, user interaction, timer signal